1. Field
Some example embodiments of the inventive concepts disclosed herein relate to semiconductor manufacturing methods for patterning line patterns to have a reduced length variation, and more particularly, to semiconductor manufacturing methods for patterning fins protruding from a substrate to have a reduced length variation.
2. Description of the Related Art
The large integration scale of semiconductor devices has led to an increased use of light of shorter wavelengths in a photolithography device fabrication process. Recently, extreme ultraviolet (EUV) photolithography using an extreme EUV wavelength, (e.g., 13.5 nm) is being extensively studied and employed to realize a design size of 100 nm or less.
A vertical field effect transistor (VTFET) are being implemented using a fin protruding from a semiconductor substrate. In a method for forming the VTFET, fins may be formed to protrude from a semiconductor substrate and extend in a first direction. Then, some portion of some of the fins are cut (e.g., removed) using a mask pattern extending in a second direction to create room for, for example, isolation regions to be ultimately formed to separate individual VTFETs from one another. Such a fin cut process is sometimes interchangeably referred to as a “FH patterning process”. The FH patterning process can be performed by using a single EUV exposure photolithography. However, lengths of fins implemented by the single EUV exposure photolithography tend to vary beyond a tolerable range, thus VTFETs including such fins tends to fail to meet a performance variation target.